On the nose of the release of processors Intel Core 12th generation, and in his anticipation of the company Intel I conducted a technical briefing with the press – we were invited there too.
In the new, 12th generation of the Intel Core Center, a new socket awaits us LGA 1700 , Chipset Intel Z690 , Recycled thermal interface and heat distribution cover, new TDP standards and technological process, as well as PCIe 5.0, DDR 5, XMP 3.0, DMI 4.0, expanded acceleration tools, fundamentally new microarchitecture and a number of other innovations, which we will discuss later.
Processor models and a situation with global deficiency
In total on architecture Alder Lake plan to build 60 processors – from desktop to mobile. However, only six options are the first to go on sale, and all with unlocked factors: Core i9-12900K , Core i9-12900KF , Core i7-12700K , Core i7-12700KF , Core i5-12600K And Core i5-12600KF. Intel assured that she could provide customer requests with the proper number of processors, and promised the absence of problems with deliveries.
SOCTECH LGA 1700
The new LGA 1700 socket is incompatible with all previous Intel processors. Firstly, the number of contacts has increased, so that the old CPs will not be able to install in it purely physically. Secondly, the packaging of the processor has now become not square, but rectangular, which, in theory, should impose new requirements for the design of cooling systems. However, immediately answer the question of what they would be, representatives of the company could not – we need to wait for official announcements from manufacturers.
Intel Z690 chipset
For the Z690 chipset, support is promised Thunderbolt 4.0 , Intel Killer Wi-Fi 6e and technology VMD (Volume Management Device). The latter is most interesting, as it came to the user segment directly from server solutions (in other words, borrowed from the processors of the series Xeon ) and allows you to build RAID massives from NVMe drives without additional hardware controllers. As for the topology of PCIE lines, we have the following: up to 12 PCIe 4 lines.0, up to 16 PCIE 3.0, and even up to 16 pcie 5.0 and 4 PCIE 4.0 go directly from CP. The final configuration, as always, will depend on the specific manufacturer of the motherboard.
Thermal interface
A part of the processors was subjected to serious improvements, which is responsible for the heat. The thickness of the thermal interface was reduced (the solder is used) and the crystal, while the solemer cover, on the contrary, became thicker. All this should positively affect the accelerated potential of processors and their temperature in ordinary use scenarios. Note that at a press conference, the word "acceleration" sounded in almost every sentence. Obviously, this time Intel makes a large bet on him, but they did not indicate the exact numbers-they only said that the results would be dictated, as usual, by luck, and therefore the company will not take anything to predict anything. Nevertheless, the conference has repeatedly emphasized that nobility enthusiasts will be satisfied.
PBP instead of the usual TDP
The usual TDP Intel refuses. Replaces him PBP (Processor Base Power). This is explained by an attempt to eliminate confusion with an understanding of how much the crystal will consume energy in practice. For example, for all processors with an unlocked multiplier, Intel will now indicate their maximum consumption in PL2 (Power Limit 2) mode. Moreover, all restrictions are now removed from K-processors: they will be able to constantly work in PL2 (maximum power), without turning into a reduced PL1 consumption mode. For example, the technical specification of the flagship Core i9-12900K will look like this: PL1 is PL2, which, in turn, is 241 W. Again, the final configuration of limits will depend on Intel partners – say, on the manufacturers of motherboard. However, for benchmarks PlayHub Casino and measurements of the maximum performance of new processors, Intel recommends that all possible restrictions in BIOS be removed.
Process process
The technological process in the 12th generation of Core processors is called "7". This is a marketing name that has nothing to do with nanometers and reflects what decisions from, for example, TSMC This or that Intel processor competes. The publication told about this Gamers Nexus , But, if we limit yourself to a simple explanation, then 10-nm crystals produced by Intel, in their opinion and in practice, compete with 7-nm TSMC products, which means they should be called “7”. So now 10 nm is “7”, and the upcoming 7 Nm is “4”. In the technical specification, however, as before, real numbers will be indicated, that is, 10 Nm for the 12th generation of Core processors.
Subsystem memory Alder Lake
Alder Lake, among other things, brings a lot of changes regarding the processor memory subsystem. The cache is finally increased to 30 MB in the third level for the top Core i9-12900K. Well, as for the second level, it will be divided between P and E-Yadra (what it is, read below): 1.25 MB per P-Yadro and 2 MB per cluster of four E-Judas. In addition, we are waiting for a transition to DDR5, but for those who are not ready to change the memory yet, there are good news: DDR4 will be supported. Most likely, the market will most likely not see hybrid boards that support both standards of memory (in any case, massively)-it will be either DDR5 or DDR4-models. Accelerate the modules, as in the case of the 11th generation of Intel Core processors, it will be possible on z, h and b chipsets. True, according to the material Tom’s Hardware, H and B Chips will only support DDR4.
At the same time, the technology will receive an update XMP (Xtreme Memory Profile). Instead of two factory profiles to the non -speaking numbers “1” and “2” now there will be three – everyone can be called for convenience as you want, plus the option will appear to save two additional user profiles.
Well, the last innovation – Intel Dynamic Memory Boost Technology or, if in Russian, the dynamic boost of memory subsystems. That is, in the peak load, it will work at the maximum frequency, and during downtime it will fall. Why is this necessary in practice, no one answered, but we assume that in order not to torment DDR modules with an excessive voltage in 24/7 mode. Another question is what algorithms for lowering the frequency will be used and whether the timing will dynamically change. And how to test all this for stability is also not clear. Well, we are waiting for the release.
Microarchitecture Alder Lake
Got to the most interesting: microarchitecture. There are changes in the car and a small cart – we will immediately say that on paper processors look very interesting. Intel itself calls the microarchitecture hybrid, and it is based on a combination of productive P-Jader and energy-efficient E-Jader (Efficicent Cores. Energy efficient kernels are scored by four blocks and do not support virtual multi-passing, while for P-Jader technology Hyper-Threading Envived.
For a better understanding, we will analyze the topology on the example of Core i9-12900K with 24 streams. There are 8 productive nuclei in it on one crystal, each of which has one virtual stream (this is already 16 streams) plus 8 energy -efficient nuclei. All other Intel Alder Lake CPU CPU will be built according to the same scheme. For example, the i7-12700K will have 8 P-nuclear and 4 E-yadra, the i5-12600K has 6 P-nuclear and 4 E-Yadra. At the same time, the productive nuclei, according to Intel, will receive up to 19% of the IPC growth (the number of instructions for one processor operator) compared to the 11th generation nuclei, and energy-efficient nuclei are comparable to the nuclei computation Intel Core i7-6700K – first CP with microarchitecture Skylake. To the question of why they decided to use the hybrid structure of the CPU in the desktop segment, although it would be more reasonable to leave such an architecture only for mobile solutions, the company replied: "The future for hybrid technologies".
Well, an interesting approach, but he gave rise to a lot of questions, the main of which is “how, in fact, all this will work?"And here we approach, perhaps, the most interesting innovation: Technology Intel Thread Director. This can be translated into Russian as a “stream manager”, and the essence of his work is to constant collection of extremely voluminous telemetry. It includes data on the loading of nuclei, their temperature, the type of instructions performed on the nuclei, the type of task (priority or background) – and all this happens constantly. Further, this telemetry is sent to process the problem planner Windows , And the catch is as follows: for working with the 12th generation of Intel Core, only the planner is fully optimized Windows 11 , While all previous versions of the OS Microsoft Thread Director needs only partially. Simply put, they simply do not have the necessary tools for processing all telemetric data, which means that the new Alder Lake processors are controlled by any other system, except Windows 11, will not work so effectively.
Get an answer to the question of what numbers could express the difference in the performance of new processors on Windows 11 and 10 Wednesdays, and failed. But one thing turned out for sure: while there are problems in the work of technology – not all software can cope with it. In particular, Intel noted that there are problems with Denuvo (technology for protecting from hacking games), but she assured that she was already conducting a dialogue with developers and soon all the difficulties will come to naught. Plus the company added that the API Thread Director is completely open and transparent, so there should not be difficulties with writing code for it under it. As for other OS – for example, on the basis of the nucleus Linux , – then the full support of Intel Thread Director promises in the very near future.
Acceleration
As we noted earlier, the acceleration during the press conference paid increased attention. They promised high results and said that a huge frequency potential was laid in the processors. For overclocking, as usual, there is everything you need: unlocked P and E-Jader factors, cache, DDR memory, built-in graphics, and also provides for acceleration by tire. In addition, it will be possible to set your own factor and turn on the Hyper Threading separately for each nucleus, set up AVX-offsets, control the dynamic boost of memory subsystems, shift the threshold of maximum temperature, accelerate PEG and DMI, and experiment with CPU PLL.
For those who do not want to overcome the motherboard BIOS, there is an updated utility Intel Extreme Tuning Utility. Almost everything can be done in it, and to save time, the function of acceleration "into one click by the mouse" is implemented.
Conclusions
Well, on the paper, Intel came out very interesting processors with a truly revolutionary microarchitecture. There are a lot of innovations, the platform is literally built from scratch. Promises regarding the growth of performance and crazy acceleration also sound optimistic, but all this has to be checked in practice, so follow our publications. Very soon we will share the results of our testing of new CPUs and issue them our own verdict.
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